Minimizing Risks Through Pre-Issuance Submissions - IIPLA

Minimizing Risks Through Pre-Issuance Submissions

Categories: IP COURSES
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About Course

About the Course:

This session provides a thorough overview of a variety of measures available to mount challenges to patent applications. Insight is provided into patent application challenges such as third-party IDS submissions; protests; ex-parte re-exams; inter-partes proceedings; and, pre-issuance submissions. The submission requirements, filing deadlines and fees are discussed for each method of opposition. Examples of statements of relevance for pre-issuance submissions are provided.

This session provides keen insight into issues such as:

  • Under which forms of opposition can / must the challenger remain anonymous?
  • At what stages of the patenting process does significant risk of opposition dissipate?
  • When can issues of indefiniteness and enablement be used to challenge a patent application?
  • What are the risks associated with mounting a challenge to a patent application?
  • How can a challenger strategically use two pieces of prior art to attack a patent application?
  • What is likely to be the result of challenges to patent applications moving from the courts to the USPTO?
  • In which circumstances can the challenger provide commentary to the submitted prior art?
  • How and when is it prudent to use claim charts when challenging a patent application?
  • How should challengers manage counsel in their campaigns to attack patent applications?
  • What is the significance of being allowed to provide descriptions of cumulative prior art?
  • Where does the intersection of pre-issuance submissions and estoppel lie?

Course Leader: Patrick Jewik, Partner Kilpatrick Townsend & Stockton LLP

Mr. Jewik has prepared and prosecuted patent applications in a number of technologies, including semiconductor devices and semiconductor manufacturing, medical devices, electronic toys, insect repellant compositions, nanofabrication processes, nanoscale materials, microfluidic chips, biochips, bioinformatics software and methods, Internet based methods, microporous filters and filter systems, and semiconductor die packages. He has successfully prosecuted both inter partes and ex parte reexamination applications and reissue patent applications, and has had many of his prosecuted patents litigated.

Mr. Jewik also worked as a patent examiner at the United States Patent and Trademark Office (USPTO) where he examined patent applications directed to superconductors, semiconductors, electroluminescent devices and materials, polymers, coatings, ceramics, composite fabric materials and circuit boards. At the USPTO, he obtained a partial signatory authority status and a masters level designation in the art of superconductor materials.

Course Length: Approx. 1.0 hours

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